The present disclosure relates to a semiconductor device including a stress-applying insulating film therein, and a method for manufacturing the same.
In order to realize the increase in speed required for semiconductor integrated circuits in recent years, there have been attempts to improve the carrier mobility through the channel region by coating a metal insulator semiconductor field effect transistor (MISFET) with a stress-applying insulating film. In order to improve the electron mobility through the channel region of an N-type MISFET, a stress-applying insulating film that gives the channel region a tensile stress in the channel length direction (the direction parallel to the direction in which carriers flow between the source and the drain) is used. In order to improve the hole mobility through the channel region of a P-type MISFET, a stress-applying insulating film that gives the channel region a compressive stress in the channel length direction is used.
In order to effectively improve the mobility with these stress-applying insulating films, it is preferred that a stress-applying insulating film is placed near the channel region. An example of such a semiconductor device is disclosed in Japanese Published Patent Application No. 2007-49166.
FIGS. 6A and 6B are cross-sectional views showing a conventional semiconductor device. As shown in FIG. 6A, a conventional semiconductor device includes a MISFET provided on a semiconductor substrate 1. The MISFET includes a gate electrode 3a on a gate insulating film, a side wall spacer 4a, a side wall spacer 5a, a deep source/drain region 8, and a silicide layer 10a. A stress-applying insulating film 11 and an interlayer insulating film 21 are also provided.